Si-Fly® LP 112 Gbps PAM4, Low Profile High-Density Cable Assembly

Si-Fly® LP is Samtec's lowest profile Flyover® cable solution capable of residing adjacent to the IC package, under heat sinks or other cooling hardware with performance to 112 Gbps PAM4.

Family Overview

Si-Fly™

The extremely low 4.35 mm profile allows Si-Fly® to be placed adjacent to the IC package and under heat sinks or other cooling hardware for design flexibility. The high-density 8 or 16 pair configurations offer optimal solutions for routing 4 or 8 channels at 112 Gbps PAM4 data rates and are PCIe® 6.0/CXL® 3.2 capable.

Features

Ultra Low Profile

  • Up to 16 pairs in an incredibly low 4.35 mm profile
  • Minimum 8.44 mm height required for mating (16 pairs)
Si-Fly Mating

Products

CPC

Copper Si-Fly® LP Low-Profile, High-Density Cable System
Features
  • Extremely low 4.35 mm mated height (view mating details here)

  • Ideal for highly dense applications where z-axis height is limited

  • Near-chip (ASIC-adjacent) cable system

  • Multiple connectors can be used side-to-side, front-to-back or in a belly-to-belly configuration

  • 34 AWG, 92 or 100 Ω Eye Speed® ultra low skew twinax cable

  • 112 Gbps PAM4 per lane

  • 16 pair aggregate data rate: 896 Gbps (x8, bi-directional) or 1.79 Tbps (x16, uni-directional)

  • PCIe® 6.0/CXL® 3.2 capable

  • Rugged swing latch for positive retention

  • Operating temperature: -25 ˚C to +85 ˚C

  • Eludes the BGA and routes signals directly from the silicon package through a long-reach cable

  • In development options: 8-pair with 3.05 mm mated height, 34 AWG Thinax™ cable, 105 ˚C operating temp

Copper Si-Fly® LP Low-Profile, High-Density Cable System

CPI

Si-Fly® LP Low-Profile, High-Density Interconnect
Features
  • Extremely low 4.35 mm mated height (view mating details here)

  • Ideal for highly dense applications where z-axis height is limited

  • Near-chip (ASIC-adjacent) cable system

  • Surface mount termination

  • Multiple connectors can be used side-to-side, front-to-back or in a belly-to-belly configuration

  • 112 Gbps PAM4 per lane

  • 16 pair aggregate data rate: 896 Gbps (x8, bi-directional) or 1.79 Tbps (x16, uni-directional)

  • PCIe® 6.0/CXL® 3.2 capable

  • Operating temperature: -25 ˚C to +85 ˚C

  • Eludes the BGA and routes signals directly from the silicon package through a long-reach cable

  • In development options: 8-pair with 3.05 mm mated height, 34 AWG Thinax™ cable, 105 ˚C operating temp

Si-Fly® LP Low-Profile, High-Density Interconnect

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